16C552 Dual UART and LPT

Pinout

Hardware structure

Approximate VHDL entity only!

entity UART16C552 is	--
port(
	n_IOR: in	std_logic;			-- Not I/O Read strobe.
	n_IOW: in	std_logic;			-- Not I/O Write strobe.
	n_RESET: in	std_logic;			-- Not Reset.
	CLK:	in	std_logic;			-- Clock. CLK is the external clock input to the baud rate divisor of each ACE.
	BDO:	out	std_logic;			-- Bus buffer. Active-high output, asserted when either the device is read.
	A:	in	std_logic_vector(2 downto 0);	-- Address.
	D:	inout	std_logic_vector(7 downto 0);	-- Data.
	CS:	in	std_logic_vector(2 downto 0);	-- Chip select.
	INT:	out	std_logic_vector(2 downto 0);	-- Interrupts.
	ENIRQ:	in	std_logic;			-- Parallel port interrupt source mode selection. 
							-- low for AT mode, high for PS-2 mode
	RXRDY:	in	std_logic_vector(1 downto 0);	-- Receiver ready. For DMA.
	TXRDY:	in	std_logic_vector(1 downto 0);	-- Transmitter ready. For DMA.
	PEMD:	in	std_logic;			-- Printer enhancement mode. 
	TRI:	in	std_logic;			-- 3-state output control input. c. 5k pullup.

	-- serial ports
	RI:	in	std_logic_vector(1 downto 0);	-- Ring Indicator.
	CTS:	in	std_logic_vector(1 downto 0);	-- Clear To Send.
	DCD:	in	std_logic_vector(1 downto 0);	-- Data Carrier Detect.
	DSR:	in	std_logic_vector(1 downto 0);	-- Data Set Ready. 
	SIN:	in	std_logic_vector(1 downto 0);	-- Serial In. 

	SOUT:	out	std_logic_vector(1 downto 0);	-- Serial Out. 
	DTR:	out	std_logic_vector(1 downto 0);	-- Data Terminal Ready. 
	RTS:	out	std_logic_vector(1 downto 0);	-- Ready To Send.

	-- Printer port
	-- the inout signals are normally used as outputs
	SLIN:	inout	std_logic;			-- Select In to printer . Open drain, c. 10k pullup.
	n_INIT:	inout	std_logic;			-- Not Init. Open drain
	n_STB:	inout	std_logic;			-- Not Strobe. Open drain, c. 10k pullup.
	n_AFD:	inout	std_logic;			-- Autofeed. Open-drain, c.10k pullup.
	PD:	inout	std_logic_vector(7 downto 0);	-- Printer Data.

	BUSY:	in	std_logic;			-- Busy. High when the printer is not ready to accept data.
	PE:	in	std_logic;			-- Paper Empty
	SLCT:	in	std_logic;			-- Select In. Open drain, c. 10k pullup.
	n_ERR: 	in	std_logic;			-- Not Error.
	n_ACK:	in	std_logic;			-- Line printer acknowledge.

	);
end entity UART16C552;

When low, PEMD enables the write data register to the PD0 –PD7 lines.
A high on PEMD allows direction control of the PD0 –PD7 port by the DIR bit in the control register.
PEMD is usually tied low for the printer operation.

TRI controls the 3-state control of all I/O and output terminals. When TRI is asserted, all I/Os and outputs are in the high-impedance state allowing board level testers to drive the outputs without overdriving internal buffers.

Register Set