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ADDRESSING MODES

Mode Assembler example Nr.of bytes Description
Immediate ADC #xx 2 The instruction is relative to the value xx.
Accumulator ASL A 1 The instruction is relative to the accumulator.
This mode exists in instructions that can
operate in memory or in the accumulator.
Relative BCC xx 2 This mode is used in branch instruction.
The program counter is incremented or
decremented by xx steps, with signal bit.
Implied INX 1 This mode refers to instructions that
need no arguments, as the value to be
manipulated is implied in the instruction's name
Zero Page LDA xx 2 One of the most interesting features of the 6502
is the Zero Page addressing. Addresses ranging from
0000 to 00FF can be accessed faster by this special mode.
Zero Page,X DEC xx,X 2 The value manipulated by the instruction is the one
contained in 00xx added with the content of the X register.
Zero Page,Y LDX xx,Y 2 The value manipulated by the instruction is the one
contained in 00xx added to the content of Y register. Appears
only in instructions that manipulate the X register.
Absolute JSR xxxx 3 The instruction is relative to the content of the address xxxx.
Absolute,X EOR xxxx,X 3 The instruction is relative to the content of the address (xxxx + X).
Absolute,Y CMP xxxx,Y 3 The instruction is relative to the content of the address (xxxx + Y).
(Indirect,X) ORA (xx,X) 2 The sum of the xx address and the X register
result in a Zero Page address which contains the effective address.
(Indirect),Y STA (xx),Y 2 The Zero Page address contains an address
which is added to the value of the Y register
to obtain the effective address.
(Indirect) JMP (xxxx) 3 The content of the xxxx address will be the address
that will contain the effective address.